Boards (PCB)

Overview

Boards (PCB) is planned as the add-on that takes a schematic to a printed circuit board: place the parts, route the tracks, run design rules checks and write the files a board maker needs. It is listed under row XE.11 of Track XE and is planned, not available. The engine under it, lib/pcb, is built and tested in the repository, but no app mounts it yet, so nothing can be added or used today.

Who it’s for

• Electronics designers who want a board drawn from the same schematic as the rest of the project, with the board outline and drilled holes available to PartCraft for an enclosure fit (planned).
• Teams that make small boards and want to export manufacturing files from a CadCraft app (planned).

What you can do

• Nothing yet. This is a plan. The intended steps are: import a netlist from the schematic, place parts with a placer, route with a multi-layer router, check design rules, and export Gerber X2, Excellon drill and IPC-2581 files, plus a view of GDSII chip layouts with a layer map and basic design rules.

Methods and standards

Planned, from the engine's design: simulated-annealing placement, a grid router that uses several layers and vias, a design rules check, and file writers for the manufacturing formats. The engine was written from published formats and methods, not from another program's source.

Data and sources

Planned. The engine ships only parametric example footprints and example rules, which its own notes say are examples and not values from a standard. A shop's own footprints and fab rule sets are meant to come as content packs.

Verification

Planned: no test yet at the add-on level. The engine has its own suite, tools/pcb-test/test.mjs, which the session log docs/0.8-sessions/xe-em-pcb_PART_3.md records as 166 passed, 0 failed on 2026-10-29. The log says the IPC-2581 output is not validated against the standard's schema and the Gerber output was checked by our own reader only, not by an independent CAM viewer.

Limits

Planned, not available. Row XE.11 is marked partial: the engine is built, but no host mounts it and there are no help lines. Limits stated for the engine: example rules and footprints only; no push-and-shove routing, differential pairs, length matching, via-in-pad or blind and buried vias; the placer ignores keep-outs, thermal and signal integrity; zones are drawn in the output without thermal reliefs.

Files and formats

Planned: reads a netlist from the schematic engine; writes Gerber X2, Excellon drill files, a Gerber job file and IPC-2581; reads and writes GDSII. The board file format in the engine is cc-board version 1.

Get started

1. This add-on is planned and cannot be added yet.
2. Follow row XE.11 on the roadmap to see when it moves to the lab.

Languages

No languages are listed for this add-on yet. Its maker may add some.

Works in

Comes with

Adding it brings these too. Engines are shared: each downloads once for every add-on that uses it.

Needed by: Electronics and PCB design.

Versions

Licence and maker

CadCraft (CadCraft, first-party). Licence: Apache-2.0. Dependencies carry their own licences, listed on their pages.